PUBLISHER: ResearchInChina | PRODUCT CODE: 1518887
PUBLISHER: ResearchInChina | PRODUCT CODE: 1518887
Autonomous Driving SoC Research Report, 2024
Autonomous driving SoC research: for passenger cars in the price range of RMB100,000-200,000, a range of 50-100T high-compute SoCs will be mass-produced.
According to ResearchInChina's statistical analysis of its database, in 2023 the penetration rate of L2+ NOA (including L2.5 highway NOA and L2.9 urban NOA, with hardware pre-embedded) in new cars in China stood at 9.67%, of which the penetration rate of L2.9 was 4.88%.
In 2023, the total sales of new cars supporting L2+ NOA (L2.5&L2.9, with hardware pre-embedded) were around 2.12 million units. Currently, the intelligent driving SoCs installed are led by Tesla FSD, NVIDIA ORIN-X /ORIN-N/Xavier, Horizon Robotics J5/J3, Huawei MDC Ascend 610, TI TDA4VM/ TI TDA4VH, and Black Sesame A1000.
50-100T high-compute autonomous driving SoCs will be quickly introduced into passenger cars in the price range of RMB100,000-200,000.
In China, passenger cars priced at RMB100,000-200,000 are still the main sales range. In current stage, the penetration rate of L2+ NOA (L2.5&L2.9, with hardware pre-embedded) in this price range is still very low, mainly due to costs.
Passenger cars in the price range of RMB100,000-200,000 are still mainly configured with entry-level L2 autonomous driving at this stage, but the installation of L2.5 autonomous driving is also increasing rapidly.
Qualcomm autonomous driving SoC -SA8650/SA8620
Qualcomm SA8650 targets passenger cars in the price range of RMB100,000-200,000. According to Qualcomm's consistent product thinking, cost-effective and rich ecosystems are its main product direction.
SA8650 boasts CPU compute of 230kDMIPs, comparable to the top-end Orin. Orin has multiple versions, and only the top-end Orin-X features CPU compute of 230kDMIPs. It is supposed that SA8650 is composed of 4 Cortex-X3 large cores and 4 A55 small cores. Limited by costs, Chinese chips cost less in CPU, with 8 A55 cores at most and general computing power of 26kDMIPs. CPU costs much more than AI, and must have advanced processes. X3 must correspond to 4nm. Orin uses 12 A78AE cores, all large cores, to be on par with SA8650.
SA8650 has AI compute of 100TOPS, higher than the main competitor NVIDIA ORIN-N, and also has strong graphics output capabilities and supports up to 4 screens. SA8650 can correspond to 12 cameras, namely, 8 8MP cameras and 4 4MP cameras. The power consumption of SA8650 is about 25-40W. If it exceeds 25W, it will be best to use a water cooling design. Currently, the design scheme of SA8650 is water cooling.
Qualcomm has not provided chips individually since the fourth generation. All of its chips are sold in the form of modules. A module is composed of a SoC, 4 power management ICs, and 2-4 LPDDR DRAMs.
By one estimate, Qualcomm SA8650 module includes one SA8650 SoC, four PMM850U power management ICs, two Micron LPDDR5 DRAMs, and one Micron UFSs. The model of Micron LPDDR5 is MT62F3G32D8DV-026 AAT:B, codenamed D8DHD, with 8 die in package, 12GB per die, and the speed of 7500Mb/s. The capacity of one UFS may be 256GB, or it may be three LPDDR5 DRAMs. There is also another chip, which may be a PCIe interface or a temperature protection chip.
The first-generation Qualcomm Ride (SA8540P) had few responders, but the second-generation Ride (SA8650P, SA8620P) has been accepted by quite a few European and American OEMs, including BMW, Mercedes-Benz, Audi, Porsche and Stellantis. It has also been accepted by many mainstream Tier1s such as Valeo, Continental Automotive, Bosch and Veoneer.
Among Chinese Tier1s, Desay SV, Joyson Electronic, EnjoyMove Technology, Haomo.ai, and Baidu have all been developing based on SA8650 for nearly a year; Hangsheng Electronics, Zongmu Technology, Autolink, MEGA, PATEO, and Freetech are introducing SA8650. A large number of OEMs are already interested in it.
Advanced Version of DJI Chengxing Platform
Based on Qualcomm Snapdragon Ride (SA8650P) and without relying on HD maps and LiDAR, it enables point-to-point NOA on urban roads and expressways, and cross-floor home-zone parking assist.
The 7V+100TOPS (Qualcomm SA8650P) version of Chengxing Platform solution enables advanced intelligent driving functions like urban NOA, which is inseparable from DJI's expertise in stereo vision, omnidirectional fisheye perception, and high-performance optimization. In addition, on the 100TOPS domain controller, DJI's latest achievements in stereo OCC, road topology model, prediction and planning model, end-to-end model optimization and so forth are also deployed.
Based on the 7V sensor configuration, it can be expanded to a 10V configuration, further enhancing the ability to cope with individual urban scenarios (such as ultra-wide and ultra-long intersections).
Momenta signed an agreement with Qualcomm
Mainly based on NVIDIA ORIN solution, Momenta's advanced intelligent driving has already been designated by OEMs like SAIC, BYD, GAC and GM, and has begun to be delivered.
On April 22, 2024, Qualcomm and Momenta officially announced power-efficient and scalable architecture of SA8620P (36TOPS) and SA8650P (100TOPS) to enable ADAS and AD functions ranging from Highway Navigation Pilot (HNP) and Urban Navigation Pilot (UNP).
Chip: SA8620P (36TOPS), SA8650P (100TOPS)
Perception configuration: 7V3R/7V1R
Functions: Highway Navigation Pilot (HNP, highway NOA), Memory Navigation Pilot (MNP, urban commute NOA), Learned Parking Navigation Pilot (LPNP), and Parking Navigation Pilot (PNP)
Target customers: The solution is aimed at mainstream passenger cars pried at RMB100,000 to 200,000, with the entry-level coming with highway NOA as standard, without the need to pay extra optional fees. It is known that Momenta's Qualcomm-based platform has been mass-produced and applied by the two OEMs Toyota and GM.
Black Sesame Autonomous Driving SoC - A1000 Series
On July 17, 2024, Dongfeng e-pi 007 offered significant upgrades in intelligent driving functions, including advanced intelligent driving functions such as highway NOA and Long-range Automated Parking Assist (LAPA), as well as a number of practical functions and experience optimizations, for intelligent driving models.
The high-configuration model of Dongfeng e-pi 007 packs Black Sesame Huashan(R) A1000 automotive high-performance autonomous driving chip, which fully supports L2+ advanced intelligent driving assistance. Dongfeng e-pi 007 can easily cope with daily intelligent driving needs after OTA updates. Huashan A1000 allows e-pi 007 to be equipped with a driving-parking integrated high-compute intelligent driving system. The highway NOA enables full-course path planning, and can automatically complete tasks of following, automatic lane change, and on-ramp and off-ramp on urban expressways and highways.
A single Black Sesame A1000 SoC can support complete driving and parking functions, providing OEMs with high-performance and cost-effective driving-parking integrated autonomous driving solutions. At present, Huashan-2 A1000 is in full mass production and has been adopted by multiple leading Chinese OEMs including FAW, Dongfeng, Geely and JAC, with production models including Lynk & Co 08, Hycan V09, Lynk & Co 07, Dongfeng e-pi 007 and Dongfeng e-pi 008.
Single-chip cockpit-driving cross-domain integration is becoming the focus of the market.
As EEA tends to be centralized, the integration of intelligent driving domain and cockpit domain has become a trend.
NVIDIA, Qualcomm, SemiDrive and Black Sesame Technologies among others were the first to release cockpit-driving integration chips; the likes of Baidu, iMotion, Bosch, ZF, Desay SV, Hangsheng Electronics and Z-ONE have also announced single-chip cockpit-driving integration domain control products and system solutions;
It is expected that during 2024-2025, single-chip cockpit-driving cross-domain integration solutions will be massively installed in vehicles.
Currently the industry has launched SoC products for cross-domain integration, such as Qualcomm 8775, Black Sesame C1296, SemiDrive X9CC, and NVIDIA Thor. Tier1s are developing system solutions based on these chips.
Continental has implemented software-defined vehicle architecture based on Qualcomm 8775. It adopts SoC+MCU architecture, with Qualcomm 8775 SoC and NXP S32G MCU. Continental builds a software system based on its CAEdge software framework to enable vehicle-cloud integrated cockpit-driving integration solutions.
Baidu is also developing Apollo Robo-Cabin, a cockpit-driving integrated computing platform based on a SOC to enable both basic intelligent driving functions such as AEB and LCC and cockpit capabilities. It adopts a cockpit-driving partition isolation design that isolates hardware, communication links and resource scheduling to ensure the independence of business, communication and operation.
In the future, the ultimate goal of this chip-software integrated solution is to realize the urban commuting + automated parking 2.0 and intelligent cockpit capabilities in terms of intelligent driving functions. Of course, seen from Baidu's layout plan for intelligent driving solutions, the underlying computing chip should at least be a medium-compute chip by then. The current mainstream 8295 is still a bit overstretched.
In the cockpit-driving integrated intelligent driving mode, based on its own OS SOA, Baidu Apollo provides complete open architecture with atomic AI capabilities, realizing multi-modal integration and creating human-machine cooperative intelligent driving, and full-vehicle intelligent experience of the intelligent cockpit. Baidu Apollo has deployed intelligent driving products, for example, all-scenario AVP, driving-parking integrated highway pilot product ANP2, and three-domain integrated urban NOA product ANP3.
At Auto China 2024, Black Sesame Technologies exhibited the mass-produced chips in the Wudang series, C1236 and C1296. A single C1236 integrates sensor access for NOA domain control, algorithm acceleration, line-speed data forwarding, 4K display, etc. Black Sesame Technologies and FAW Hongqi jointly launched a single-chip intelligent vehicle control project based on the C1200 family. The new cooperative solution is based on the C1200 family and will cover intelligent driving, vehicle data exchange and control functions.
Black Sesame Technologies officially announced CoreFusion, a C1296-based cockpit-driving integrated software open platform jointly created with Nesinext.
Will SoCs self-developed by OEMs become mainstream?
Background of OEMs strengthening independent development of SoCs
Cost control: The unit price of the mainstream ORIN-X SoC is at least USD250, that is, more than USD500 for two. The price of Thor is at least USD500 per unit. OEMs develop SoCs in house, hoping to achieve cockpit-driving integration with a single chip and replace the current NVIDIA ORIN + Qualcomm 8295 combination to cut down costs. Typical examples include NIO NX9031, and Xpeng and NVIDIA's customized 750T version of Thor. However self-developed SoCs need to achieve scale effect, and with shipments of at least 1 million units, they will be cost-effective.
Independent and controllable: in the context of US sanctions, relying on only Orin, Thor or Qualcomm 8295/8255 brings a bigger supply chain risk. OEMs prefer to introduce more domestic alternatives into high-level autonomous driving. A typical example is SiEngine, which is supported by Geely and has developed AD1000 intelligent driving SoC and SE1000 cockpit SoC.
Product customization and AI-oriented development: the SoC designs of NVIDIA, Qualcomm and other companies are oriented to general needs. IP, circuit design, tool chain and other links all target the general needs of customers, resulting in high complexity in chip design. Yet OEMs can design chips just based on their own needs and do not need to open them to the outside world, so the chip design is less complex, and highly integrated with their own intelligent driving algorithms, and even cloud AI chips. Typical examples include Tesla FSD and cloud Dojo chips. Li Auto is also self-developing intelligent driving SoCs and cloud AI chips, and plans to tape out in 2024 and start production as early as 2026.
Challenges faced by OEMs in self-developing SoCs
In the current market environment, it is quite challenging for OEMs to independently develop chips. On the one hand, they have to compete with professional chip design companies in development speed, product definition capabilities, human resources and management capabilities; on the other hand, it is difficult for a single OEM to purchase tens of millions of chips, so whether they can make continuous investments is a huge challenge.
The annual shipments of an automotive SoC are lower than one million units, making it difficult to support the continuous investments in chip R&D. If OEMs do not have sufficient shipments, it will be difficult for them to recover the costs, and lowering the chip cost of vehicles will be even a false hope.
Independent chip manufacturing is more suitable for OEMs or OEM alliances with large shipments (SiEngine has developed multiple leading customers like Geely, FAW, Zeekr, and Volvo; Xpeng has chosen to form an alliance with Volkswagen) or OEMs with high unit prices of vehicles (NIO and Li Auto target high-end users).
For OEMs, "chip + operating system" must be developed in pair to bring its performance advantages into full play.
In September 2023, NIO introduced SkyOS, an all-domain vehicle operating system for intelligent electric vehicles. It is the underlying operating system for NIO cars. According to NIO's plan, the full-function mass production of SkyOS will be realized on NT3 platform-based models, which will be equipped with the self-developed intelligent driving SoC Shenji NX9031.
It is speculated that Shenji NX9031 should be a 5nm cross-domain integration chip mainly for autonomous driving. To save costs, it is expected to be manufactured by Samsung, just like Tesla FSD, as OEM by TSMC is too expensive.
Transistors: 50+ billion
CPU, ARM IP, Cortex-A78AE, 32-core CPU configuration, and both large and small core configuration, performance of 615KDMIPS, far higher than NVIDIA ORIN (228KDMIP, 12-core CPU)
ISP, developed in-house by NIO, high dynamic range; 26 bits (bit width is mainly subject to the dynamic range of ADC, the higher the bit width of ISP the higher the frame rate can be, and the bit width of most ISPs are only 10 or 12 bits); image bandwidth of 6.5GPixel/s, far higher than NVIDIA ORIN (1.85Gpixel/s); processing delay of <5ms
NPU, the core of intelligent driving SoC, has computing power equivalent to 4 ORIN-X SoCs; the self-developed reasoning acceleration unit NPU (NPU TPP compute, total power performance: <4800) can run various AI algorithms flexibly and efficiently.
Memory: LPDDR5X, bandwidth of 8533Mbps, performance higher than LPDDR5
Bus: ARM, NOC bus IP, building a data transmission channel between CPU, BPU, GPU and MCU
Functional safety: ASIL-D level, just adding an MCU island, generally 2 to 4 Cortex-R52 cores for lockstep
Table of Contents
1 Autonomous Driving SoC Passenger Car Market Research and Data Analysis
- 1.1 Autonomous Driving SoC Market Share
- 1.1.1 Installation Rate of L1-L4 Autonomous Driving System (Including Hardware Embedded) for Passenger Cars in China
- 1.1.2 China Autonomous Driving SoC Market Size, 2023-2027E
- 1.1.3 Global Autonomous Driving SoC Market Size, 2023-2027E
- 1.1.4 Revenue Statistics of Global Autonomous Driving SoC Vendors, 2021-2023
- 1.1.5 China L2 (Entry-level) Autonomous Driving SoC Market Share, 2023-2024
- 1.1.6 China L2.5 (Highway NOA) Autonomous Driving SoC Market Share, 2023-2024
- 1.1.7 China L2.9 (Urban + Highway NOA) Autonomous Driving SoC Market share, 2023-2024
- 1.2 Research on Autonomous Driving System Market of Passenger Cars by Price Range (Jan.-Apr.2024)
- 1.2.1 China Passenger Car L2.9 Autonomous Driving (Including Hardware Embedded) by Price Range (Jan.-Apr.2024)
- 1.2.2 China Passenger Car L2.5 Autonomous Driving (Including Hardware Embedded) by Price Range (Jan.-Apr.2024)
- 1.2.3 China Passenger Car L2 Autonomous Driving by Price Range (Jan.-Apr.2024)
- 1.3 Research on Autonomous Driving System Market for Passenger Cars by Price Range (2023)
- 1.3.1 China Passenger Car L2.9 Autonomous Driving (Including Hardware Embedded) Distribution by Price Range (2023)
- 1.3.2 China Passenger Car L2.5 Autonomous Driving (Including Hardware Embedded) Distribution by Price Range (2023)
- 1.3.3 China Passenger Car L2 Autonomous Driving Distribution by Price Range (2023)
- 1.4 Market Share of Autonomous Driving SoC Suppliers for Passenger Cars by Price Range
- 1.4.1 Market Share of China Autonomous Driving SoC Suppliers (0-100,000 yuan)
- 1.4.2 Market Share of China Autonomous Driving SoC Suppliers (100-150,000 yuan)
- 1.4.3 Market Share of China Autonomous Driving SoC Suppliers (150-200,000 yuan)
- 1.4.4 Market Share of China Autonomous Driving SoC Suppliers (200-250,000 yuan)
- 1.4.5 Market Share of China Autonomous Driving SoC Suppliers (250-300,000 yuan)
- 1.4.6 Market Share of China Autonomous Driving SoC Suppliers (300-350,000 yuan)
- 1.4.7 Market Share of China Autonomous Driving SoC Suppliers (350-400,000 yuan)
- 1.4.8 Market Share of China Autonomous Driving SoC Suppliers(400-500,000 yuan)
- 1.4.9 Market Share of China Autonomous Driving SoC Suppliers (Over 500,000 yuan)
- 1.5 Cockpit-Driving Integration SoC platform
- 1.5.1 Key Competitors of Cockpit-Driving Integration SoC
- 1.6 200T and Above Ultra-high Computing Power Autonomous Driving SoC Platform
- 1.6.1 Key Competitors of 200T and Above Ultra-high Computing Power Autonomous Driving SoC
- 1.6.2 Key Competitors of 200T and Above Ultra-high Computing Power Autonomous Driving SoC
- 1.7 80-200T Large Computing Power Intelligent Driving SoC Platform
- 1.7.1 Key Competitors of 80-200T Large Computing Power Autonomous Driving SoC
- 1.7.2 Key Competitors of 80-200T Large Computing Power Autonomous Driving SoC
- 1.8 20-80T Medium Computing Power Autonomous Driving SoC Platform
- 1.8.1 Key Competitors of 20-80T Medium Computing Power Autonomous Driving SoC
- 1.8.2 Key Competitors of 20-80T Medium Computing Power Autonomous Driving SoC
- 1.9 20T and Below Low Computing Power Autonomous Driving SoC platform
- 1.9.1 Key Competitors of 20T and Below Low Computing Power Autonomous Driving SoC
2 OEMs' Autonomous Driving SoC Solution Deployment and Self-research Strategy
- 2.1 OEM Autonomous Driving SoC Deployment Solution
- 2.1.1 Geely (Geely, Zeekr, Lotus) Autonomous Driving Solution and SoC Selection Strategy (Including On-going Research Projects)
- 2.1.2 BYD (BYD, Denza,Yangwang) Autonomous Driving Solution and SoC Selection Strategy (Including On-going Research Projects)
- 2.1.3 SAIC (SAIC, IM, Rising Auto) Autonomous Driving Solution and SoC Selection Strategy (Including On-going Research Projects)
- 2.1.4 Great Wall Motor and Changan (Avatr, Deepal, Changan) Autonomous Driving Solution and SoC Selection Strategy (Including On-going Research Projects)
- 2.1.5 GAC, FAW and Dongfeng (Dongfeng, Voyah) Autonomous Driving Solution and SoC Selection Strategy (Including On-going Research Projects)
- 2.1.6 Tesla, Li Auto, NIO Autonomous Driving Solution and SoC Selection Strategy (Including On-going Research Projects)
- 2.1.7 Xpeng, Neta, AITO, and Jiyue Autonomous Driving Solution and SoC Selection Strategy (Including On-going Research Projects)
- 2.1.8 Avatr, ArcFox, PoleStones, Hycan, Leapmotor, Chery Sterra, Jianghuai Autonomous Driving Solution and SoC Selection Strategy (Including On-going Research Projects)
- 2.1.9 Volkswagen (China), SAIC-GM Autonomous Driving Solution and SoC Selection Strategy (Including On-going Research Projects)
- 2.1.10 Toyota (China), Mercedes-Benz (China) Autonomous Driving Solution and SoC Selection Strategy (Including On-going Research Projects)
- 2.2 Background of OEMs' Self-developed Autonomous Driving SoCs
- 2.2.1 Logic of OEMs to Strengthen SoC Self-Research
- 2.2.2 OEMs self-developed SoCs mainly targeting Advanced ADAS Applications
- 2.2.3 Feasible Strategic Choice of OEM Chip Making
- 2.2.4 Horizon Proposes to open BPU IP Licensing Business Model and Strengthen Cooperation with Automakers to Develop Chips
- 2.2.5 Key Technologies Required for High-Performance Automotive-grade Chip Architecture
- 2.2.6 Autonomous Driving SoCs Need to Go through a long process of Mass Production
- 2.2.7 Automotive-grade Chip Should Meet Automotive Supply Chain Standard System Specification
- 2.3 Tesla Self-developed SoC
- 2.3.1 Tesla FSD HW5.0 Estimation (1)
- 2.3.2 Tesla FSD HW5.0 Estimation (2)
- 2.3.3 Parameter Evolution of Tesla FSD HW1.0 - HW4.0 System
- 2.3.4 Tesla HW 4.0 2nd GEN FSD SoC: Typical Characteristics
- 2.3.5 Tesla HW 4.0 2nd GEN FSD SoC: FSD Main Chip has Tripled Computing Power and can support GDDR6
- 2.3.6 Tesla HW 4.0 2nd GEN FSD SoC: Further Upgrade of MAC and SRAM Capacity to Improve Computing Power of Convolutional Neural Networks
- 2.3.7 Parameter Comparison between Tesla HW 4.0 2nd GEN FSD SoC and HW3.0 1st GEN FSD SoC
- 2.3.8 Tesla HW3.0 1st GEN FSD SoC: Chip IP
- 2.3.9 Tesla HW3.0 1st GEN FSD SoC: Chip Internal Structure
- 2.3.10 Tesla HW3.0 1st GEN FSD SoC: NPU Design
- 2.4 NIO Self-developed SoC
- 2.4.1 Background: Tianshu SkyOS + Autonomous Driving SoC NX9031
- 2.4.2 Background: Master Adam Supercomputer Platform Self-developed Know-how
- 2.4.3 NIO Autonomous Driving SoC "Shenji NX9031": Development Background
- 2.4.4 NIO Autonomous Driving SoC "Shenji NX9031": Performance Parameters
- 2.4.5 Benchmarking of NIO Shenji NX9031 and the next generation of Advanced Autonomous Driving SoC
- 2.5 XPeng Motors Self-developed SoC
- 2.5.1 Background: Cooperate with Volkswagen CEA, or Accelerate Self-developed Pace of SoC
- 2.5.2 Background: Deepening Technical Barriers of E2E Autonomous Driving
- 2.5.3 Autonomous Driving SoC: Development Background and Performance Calculation
- 2.6 Li Auto Self-developed SoC
- 2.6.1 Development Background
- 2.7 Momenta Self-developed SoC
- 2.7.1 Development Background
- 2.8 Leapmotor Lingxin Self-developed SoC
- 2.8.1 Technical Architecture and Features
- 2.8.2 Technical Parameters
3 Product Selection and Tier1 Support Solutions for Domestic and Foreign Autonomous Driving SoC Vendors
- 3.1 NVIDIA ORIN/Thor series and Tier1 System Solution
- 3.1.1 NVIDIA Autonomous Driving SoC Portfolio
- 3.1.2 Tier1s that NVIDIA ORIN mainly Supported and Mass Production Solutions (1)
- 3.1.3 Tier1s that NVIDIA ORIN mainly Supported and Mass Production Solutions (2)
- 3.2 Qualcomm 8650/8620/8775 Series and Tier1 System Solution
- 3.2.1 Qualcomm Autonomous Driving SoC Product Portfolio
- 3.2.2 Tier1s that Qualcomm SA8650P/SA8620P/SA8775P mainly Supported and Mass Production Solutions (1)
- 3.2.3 Tier1s that Qualcomm SA8650P/SA8620P/SA8775P mainly Supported and Mass Production Solutions (2)
- 3.2.4 Tier1s that Qualcomm SA8650P/SA8620P/SA8775P mainly Supported and Mass Production Solutions (3)
- 3.2.5 Qualcomm Ride Autonomous Driving SoC System Solution (1): ThunderSoft Vehicle Operating System "AquaDrive OS"
- 3.2.6 Qualcomm Ride Autonomous Driving SoC System Solution (1): ThunderX Autonomous Driving RazorDCX Pantanal-SA8650
- 3.2.7 Qualcomm Ride Autonomous Driving SoC System Solution (1): ThunderX Autonomous Driving RazorDCX Congo-SA8620
- 3.2.8 Qualcomm Ride Autonomous Driving SoC System Solution (2): DJI Chengxing Platform 7V "Advanced Edition"
- 3.2.9 Qualcomm Ride Autonomous Driving SoC System Solution (2): DJI Chengxing Platform 7V "Advanced Edition"
- 3.2.10 Qualcomm Ride Autonomous Driving SoC System Solution (2): DJI Inertial Navigation Trino and LiDAR Assembly
- 3.2.11 Qualcomm Ride Autonomous Driving SoC System Solution (2): DJI Inertial Navigation Trino and LiDAR Assembly
- 3.2.12 Qualcomm Ride Autonomous Driving SoC System Solution (2): DJI Inertial Navigation Trino and LiDAR Assembly
- 3.2.13 Qualcomm Ride Autonomous Driving SoC System Solution (3): Momenta
- 3.2.14 Qualcomm Ride Autonomous Driving SoC System Solution (4): Haomo.ai HP370
- 3.2.15 Qualcomm Ride Autonomous Driving SoC System Solution (4): Haomo.ai HP570
- 3.2.16 Qualcomm Flex Cockpit-Driving Integration SoC System Solution: ThunderX Autonomous Driving Single SoC Cockpit-Driving Integration Domain Control RazorDCX Tarkine
- 3.3 Mobileye EyeQ5/EyeQ6 Series and Tier1 System Solution
- 3.3.1 Mobileye SoC Portfolio
- 3.3.2 Tier1s that Mobileye EyeQ Series mainly Supported and Mass Production Solutions (1)
- 3.3.3 Tier1s that Mobileye EyeQ Series mainly Supported and Mass Production Solutions (2)
- 3.4 TI TDA4VL/TDA4VM/TDA4VH Series and Tier1 System Solution
- 3.4.1 TI Autonomous Driving SoC Portfolio
- 3.4.2 Tier1s that TI TDA4VM mainly Supported and Mass Production Solutions (1)
- 3.4.3 Tier1s that TI TDA4VM mainly Supported and Mass Production Solutions (2)
- 3.4.4 Tier1s that TI TDA4VH/TI TDA4VM-Plus mainly Supported and Mass Production Solutions
- 3.4.5 Features of TI Autonomous Driving SoC Solution
- 3.4.6 System Architecture of TI TDA4VH Solution
- 3.4.7 Freetek ADC30 Domain Controller Design Block Diagram
- 3.4.8 Desay SV Driving-Parking Integration Domain Controller IPU02
- 3.4.9 System Architecture of TI TDA4VM Solution
- 3.4.10 Single Chip AVP System (1)
- 3.4.11 Single Chip AVP System (2)
- 3.4.12 Single Chip AVP System (3)
- 3.5 Renesas R-CAR V4/V3 Series and Tier1 System Solution
- 3.5.1 Renesas Intelligent Driving SoC Product Portfolio
- 3.6 Horizon J3/J5/J6 Series and Tier1 System Solution
- 3.6.1 Horizon Autonomous Driving SoC
- 3.6.2 Journey J6 Roadmap
- 3.6.3 Horizon Journey J6 Product Positioning, Customers and Partners
- 3.6.4 Tier1s that Horizon J6 mainly Supported and Mass Production Solutions
- 3.6.5 Horizon Journey J5/J3 "Cost-effective" and "High-performance" Driving-Parking Integrated Product Solution Portfolio
- 3.6.6 Tier1s that Horizon J5 mainly Supported and Mass Production Solutions (1)
- 3.6.7 Tier1s that Horizon J5 mainly Supported and Mass Production Solutions (2)
- 3.6.8 Typical Architecture of Horizon J3 Solution System
- 3.6.9 Typical Architecture of Horizon J3 + TI TDA4VM Solution System
- 3.6.10 Typical Architecture Three Horizon J3 Solution System
- 3.7 Black Sesame A1000/A2000/C1000 Series and Tier1 System Solution
- 3.7.1 Black Sesame Autonomous Driving SoC Product Portfolio
- 3.7.2 Next Generation Huashan A2000 and Wudang Cross-domain SoC
- 3.7.3 Drive-BEST Software and Hardware Reference Solution
- 3.7.4 Tier1s that A1000 series mainly Supported and Mass Production Solutions
- 3.7.5 ECARX Tianqiong Pro Intelligent Driving Platform
- 3.7.6 1ST GEN Car Brain (ECARX Super Brain)
- 3.7.7 Tier1s that C1000 series mainly Supported and Mass Production Solutions
- 3.8 Huawei MDC610/MDC810 and Tier1 System Solutions
- 3.8.1 Huawei Autonomous Driving SoC
- 3.9 SemiDrive V9/X9 series and Tier1 System Solution
- 3.9.1 Autonomous Driving SoC
- 3.9.2 Cockpit-Driving Integration SoC Chip - X9 Series
- 3.9.3 X9CC: A Multi-Core Heterogeneous Computing Platform Designed for Central Computing
- 3.9.4 E/E Architecture and Intelligent Driving Solution based on X9 series
- 3.10 SiEngine AD1000/SE1000 and Tier1 System Solution
- 3.10.1 AD1000 Product and Performance Summary
- 3.10.2 AD1000 Performance Parameters
- 3.10.3 AD1000 Multi-chip Cascade to Achieve Computing Power Expansion
- 3.10.4 Cockpit-Driving Integration Solution based on "Longying No.1" SE1000
- 3.10.5 Cockpit-Parking Integration Solution based on "Longying No.1" SE1000
- 3.10.6 "Longying No.1" SE1000 Autonomous Driving Solution - ECARX Antola (R) 1000 Computing Platform
- 3.10.7 "Longying No.1" SE1000 Autonomous Driving Solution - ECARX Antola (R) 1000 Pro Computing Platform
4 Global Autonomous Driving SoC Vendors and SoC Chip Design
- 4.1 Qualcomm
- 4.1.1 Qualcomm Ride 8650/8620
- 4.1.1.1 Qualcomm Ride Autonomous Driving SoC Feature Analysis: SA8650 Sold by Module
- 4.1.2 Qualcomm Flex 8775
- 4.1.2.1 Qualcomm Flex Cockpit-Driving Integration SoC Feature Analysis: QAM8775P Module Internal Block Diagram
- 4.1.2.2 Qualcomm Flex Cockpit-Driving Integration SoC Feature Analysis: QAM8775P Module External Block Diagram
- 4.1.2.3 Qualcomm Flex Cockpit-Driving Integration SoC Feature Analysis: Cooperation with Eclipse Foundation and SOAFEE to Standardize Cockpit-Driving Integration Software
- 4.1.3 Qualcomm Snapdragon Ride Software Stack
- 4.1.3.1 Qualcomm Snapdragon Ride Vision Software Stack (1)
- 4.1.3.2 Qualcomm Snapdragon Ride Vision Software Stack (2)
- 4.1.3.3 Qualcomm Snapdragon Ride Software Development Model: A Long-Term Development Vision to Support SDV
- 4.1.1 Qualcomm Ride 8650/8620
- 4.2 NVIDIA
- 4.2.1 NVIDIA Autonomous Driving SoC Product Strategy and Portfolio
- 4.2.1.1 NVIDIA Autonomous Driving SoC Portfolio (1)
- 4.2.1.2 NVIDIA Autonomous Driving SoC Portfolio (2)
- 4.2.1.3 NVIDIA Autonomous Driving SoC Portfolio (3)
- 4.2.1.4 NVIDIA Autonomous Driving SoC Portfolio (4)
- 4.2.2 NVIDIA Thor
- 4.2.2.1 NVIDIA's Next Generation Central Computing SoC Thor
- 4.2.2.2 NVIDIA Thor Architecture Design: NVIDIA Hopper Architecture GPU is actually NVIDIA H100 GPU
- 4.2.2.3 NVIDIA Thor Architecture Design: NVIDIA Hopper Architecture GPU System Block Diagram
- 4.2.2.4 NVIDIA Thor Architecture Design: NVIDIA Grace Architecture CPU adopts Arm Neoverse V2 core (1)
- 4.2.2.5 NVIDIA Thor Architecture Design: NVIDIA Grace Architecture CPU adopts Arm Neoverse V2 core (2)
- 4.2.2.6 NVIDIA Thor Architecture Design: Blackwell Architecture, can Support 7 billion Parameter Large Model
- 4.2.2.7 NVIDIA Thor Series Product Parameters
- 4.2.2.8 NVIDIA Thor Supports NVLink Multi-chip Cascade
- 4.2.3 NVIDIA ORIN
- 4.2.3.1 NVIDIA ORIN SoC System Architecture: Frame Diagram
- 4.2.3.2 NVIDIA ORIN SoC System Architecture: Functional Design
- 4.2.3.3 NVIDIA ORIN SoC System Architecture: CPU
- 4.2.3.4 NVIDIA ORIN SoC System Architecture: GPU
- 4.2.3.5 NVIDIA ORIN SoC System Architecture: Deep Learning Accelerator DLA
- 4.2.3.6 NVIDIA ORIN SoC System Architecture: Programmable Vision Accelerator PVA, Focusing on Promoting VPI (Vision/Image Processing Algorithm Library Interface)
- 4.2.3.7 NVIDIA ORIN SoC System Architecture: Interface
- 4.2.3.8 Frame Diagram of Intelligent Driving Domain Controller Based on Orin
- 4.2.4 NVIDIA Autonomous Driving Software and Algorithm Library
- 4.2.4.1 NVIDIA Software Solutions: underlying DRIVE (R) OS, Middleware DRIVEWORKS, DRIVE AV/DRIVE IX
- 4.2.4.2 NVIDIA Algorithm Library: VPI (Visual/Image Processing Algorithm Library Interface)
- 4.2.5 NVIDIA DRIVE Hyperion and DRIVE Autopilot "Turnkey" Solutions
- 4.2.5.1 NVIDIA Hyperion Technology Roadmap
- 4.2.5.2 Hyperion 9 launched in 2024, loaded in 2026
- 4.2.5.3 NVIDIA Drive Hyperion 8
- 4.2.5.4 NVIDIA Drive Hyperion 8.1: Development Platform Architecture for L2 +
- 4.2.5.5 NVIDIA Drive Hyperion 8.1: Development Platform Architecture for L2 +
- 4.2.5.6 NVIDIA Drive Hyperion 8.1: Development Platform Architecture for L2 +
- 4.2.5.7 NVIDIA Drive Hyperion 8.1: Development Platform Architecture for L3/L4
- 4.2.5.8 NVIDIA Drive Hyperion 8.1: Ethernet Switch with Broadcom BCM8957X
- 4.2.5.9 NVIDIA DRIVE AutoPilot (for L2 +, based on Xavier)
- 4.2.1 NVIDIA Autonomous Driving SoC Product Strategy and Portfolio
- 4.3 Mobileye
- 4.3.1 Mobileye SoC Product Strategy and Portfolio
- 4.3.1.1 Mobileye Redefines ODD from Consumers
- 4.3.1.2 Mobileye to Define Consumers' eye-catching ODD
- 4.3.1.3 Mobileye's Chip, Sensor and Domain Control Roadmap for Consumer-Redefining ODD
- 4.3.1.4 Mobileye EyeQ Series Product Line: Typical Technical Parameters
- 4.3.1.5 Mobileye Autonomous Driving SoC Portfolio (1)
- 4.3.1.6 Mobileye Autonomous Driving SoC Portfolio (2)
- 4.3.1.7 Mobileye Autonomous Driving SoC Portfolio (3)
- 4.3.2 Mobileye EyeQ Ultra
- 4.3.2.1 Mobileye EyeQ Series: EyeQ Ultra, EyeQ6L, EyeQ6H
- 4.3.2.2 Mobileye EyeQ Series: EyeQ (R) Ultra (TM) System Integrated Chip
- 4.3.2.3 Mobileye EyeQ Series: EyeQ (R) Ultra (TM) System Architecture
- 4.3.2.4 Autonomous Driving Solution based on EyeQ (R) Ultra (TM) - SuperVision (TM)
- 4.3.3 Mobileye EyeQ6 Series
- 4.3.3.1 Mobileye EyeQ Series: EyeQ (R) 6L/6H System Integrated Chip
- 4.3.3.2 Mobileye EyeQ Series: EyeQ6H Chip Architecture Diagram
- 4.3.3.3 Mobileye EyeQ Series: EyeQ6L Chip Architecture Diagram
- 4.3.3.4 Mobileye EyeQ Series: EyeQ (TM) 6L System Integrated Chip Mass production in 2024
- 4.3.3.5 Mobileye EyeQ Series: EyeQ6 with Intel Atom Core
- 4.3.4 Mobileye EyeQ5 Series
- 4.3.4.1 Mobileye EyeQ Series: EyeQ5 Chip System Framework Diagram
- 4.3.4.2 Mobileye EyeQ Series: EyeQ5 Chip Function Block Diagram
- 4.3.4.3 Mobileye EyeQ Series: EyeQ5 Chip Open Platform (allows third-party code to run)
- 4.3.5 Mobileye Tools and Software Products
- 4.3.5.1 EyeQ Kit and REM Crowdsourcing Maps
- 4.3.5.2 REM Crowdsourcing Maps
- 4.3.5.3 REM Crowdsourcing Maps
- 4.3.5.4 4D Millimeter Wave Image Radar, Flash LiDAR, FMCW LiDAR
- 4.3.5.5 Mobileye Sensor Products: Predicting 4D Imaging Radar Performance Levels
- 4.3.5.6 Mobileye Sensor Products: will Partner with Wistron Technology to Produce its Software-defined Imaging Radar
- 4.3.5.7 Mobileye Sensor Products: plans to Provide Autonomous Driving packages including Chip/Vision/Radar
- 4.3.6 Mobileye SuperVision and Mobileye Drive "Turnkey" Solutions
- 4.3.6.1 Mobileye Portfolio: L2-L4 Autonomous Driving Solutions
- 4.3.6.2 Mobileye Portfolio: two L4-oriented Solutions
- 4.3.6.3 Mobileye's main Autonomous Driving Solution: EyeQ5 + SuperVision, for L2 +
- 4.3.6.4 Mobileye's main Autonomous Driving solution: L4 Mobileye Drive, for L3/L4
- 4.3.6.5 Mobileye's Autonomous Driving Solution: L4 Autonomous Driving Solution Based on Six EyeQ5s
- 4.3.1 Mobileye SoC Product Strategy and Portfolio
- 4.4 TI
- 4.4.1 TI Jacinto 7 Platform Autonomous Driving SoC Product Strategy and Portfolio
- 4.4.1.1 TI Jacinto 7 Automotive Processor Platform: Overview
- 4.4.1.2 TI Jacinto 7 Automotive Processor Platform: Enabling Versatile Integration of ADAS-SoCs
- 4.4.1.3 TI Jacinto 7 Automotive Processor Platform: Hyper-Heterogeneous Design (1)
- 4.4.1.4 TI Jacinto 7 Automotive Processor Platform: Hyper-Heterogeneous Design (2)
- 4.4.1.5 TI Jacinto 7 Automotive Processor Platform: Hyper-Heterogeneous Design (3)
- 4.4.1.6 TI Jacinto 7 Automotive Processor Platform: Hyper-Heterogeneous Design (4)
- 4.4.1.7 TI's Autonomous Driving SoC Portfolio
- 4.4.2 TI TDA4 Series: TI TDA4VL, TI TDA4VM, TI TDA4VH
- 4.4.2.1 TI TDA4x SoCs Include Several Families of Products
- 4.4.2.2 TI TDA4x SoC Application Field
- 4.4.2.3 TI TDA4x SoC Design Reference (Evaluation Module)
- 4.4.2.4 TI TDA4AH SoC
- 4.4.2.6 Matrix Multiplication Accelerator (MMA) of TI TDA4VM SoC Deep Learning
- 4.4.3 TI Autonomous Driving Software and Algorithm Products
- 4.4.3.1 TI Autonomous Driving Software Algorithm: Key Algorithm Part of TDA4x SoC-- OpenVX (1)
- 4.4.3.2 TI Autonomous Driving Software Algorithm: Key Algorithm Part of TDA4x SoC-- OpenVX (2)
- 4.4.3.3 TI Autonomous Driving Software Algorithm: Key Algorithm Part of TDA4x SoC-- OpenVX (3)
- 4.4.3.4 TI Autonomous Driving Software Algorithm: Key Algorithm Part of TDA4x SoC-- OpenVX (4)
- 4.4.1 TI Jacinto 7 Platform Autonomous Driving SoC Product Strategy and Portfolio
- 4.5 Renesas Electronics
- 4.5.1 Renesas Intelligent Driving SoC Product Strategy and Portfolio
- 4.5.1.1 Renesas Automotive Chip Business Strategy (1): ADAS and Battery/Electric Motor/Electronic Control Chips
- 4.5.1.2 Renesas Automotive Chip Business Strategy (2): Cross-Domain Domain/Zone Architecture
- 4.5.1.3 Renesas Autonomous Driving SoC Product Portfolio (1)
- 4.5.1.4 Renesas Autonomous Driving SoC Product Portfolio (2)
- 4.5.2 Renesas R-CAR Series
- 4.5.2.1 R-Car Product Family
- 4.5.2.2 R-Car V3U SoC
- 4.5.2.3 Key Features of R-Car V3U SoC
- 4.5.2.4 R-Car V3U SoC Internal Framework
- 4.5.2.5 R-Car V3U SoC with Imagination Low Power GPU
- 4.5.2.6 R-Car V3U SoC Modular Design
- 4.5.2.7 R-Car V3H SoC
- 4.5.2.8 R-Car V3H SoC Product Block Diagram
- 4.5.2.9 R-Car V3H SoC Performance Parameters
- 4.5.2.10 R-Car V3H SoC focuses on Ultra-low Power Consumption
- 4.5.2.11 R-Car V3H SoC Outstanding Visual Performance
- 4.5.2.12 R-Car V3H SoC for L4 Computing Platform
- 4.5.2.13 R-Car V3H SoC Upgraded R-Car V3H2 SoC
- 4.5.2.14 R-Car V3M SoC Product Block Diagram
- 4.5.3 Renesas Autonomous Driving Software and Algorithm Products
- 4.5.3.1 Renesas Autonomous Driving "Turnkey" Solution: EagleCAM Developer Platform
- 4.5.3.2 Renesas Autonomous Driving Software Products: R-Car Software Development Kit (SDK)
- 4.5.1 Renesas Intelligent Driving SoC Product Strategy and Portfolio
- 4.6 Ambarella
- 4.6.1 Autonomous Driving SoC Product Strategy and Portfolio
- 4.6.1.1 Profile
- 4.6.1.2 Global Business Layout
- 4.6.1.3 Technology and Product Strategy: Adhere to "Algorithm First" Development Strategy
- 4.6.1.4 Technology and Product Strategy: Vision Priority
- 4.6.1.5 Technology and Product Strategy: AI Intelligent Algorithm Accelerator Architecture CVflow
- 4.6.1.6 Technology and Product Strategy: Emphasis on Computing Power Efficiency
- 4.6.1.7 Technology and Product Strategy: Acquisition of Oculiiu
- 4.6.1.8 Technology and Product Strategy: Oculiiu Core Technology, Virtual Aperture AI Radar Algorithm (1)
- 4.6.1.9 Technology and Product Strategy: Oculiiu Core Technology, Virtual Aperture AI Radar Algorithm (2)
- 4.6.1.10 Technology and Product Strategy: Oculiiu 4D Imaging Radar Scenario (1)
- 4.6.1.11 Technology and Product Strategy: Oculiiu 4D Imaging Radar Scenario (2)
- 4.6.1.12 Technology and Product Strategy: Mainly Centralized 4D Imaging Millimeter Wave Radar Architecture
- 4.6.1.13 Technology and Product Strategy: Comparison of Centralized and Edge Processing 4D Imaging Processing Technologies
- 4.6.1.14 Automotive Software Partners
- 4.6.1.15 Autonomous Driving SoC Product Portfolio (1)
- 4.6.1.16 Autonomous Driving SoC Product Portfolio (2)
- 4.6.2 CV3 Series
- 4.6.2.1 Autonomous Driving SoC: CV3
- 4.6.2.2 CV3 Fusion 4D Imaging Radar Software Algorithm
- 4.6.2.3 CV3 Neural Networks Vector Processor (NVP) Equivalent Computing Power up to 500 eTOPS
- 4.6.2.4 Will Launch Multiple CV3 Series with Different Positioning in the future
- 4.6.2.5 Domain Control Architecture Based on CV3
- 4.6.2.6 2023CES Releases New Product, Domain Control AI Chip CV3-AD685
- 4.6.2.7 CV3-AD685 AI Chip, Key Performance Features (1)
- 4.6.2.8 CV3-AD685 AI Chip, Key Performance Features (2)
- 4.6.2.9 CV3-AD685 AI Chip, What can it Bring to Customers?
- 4.6.2.10 CV3-AD685 AI chip, cooperating with Tier1 Customers
- 4.6.3 CV2 Series
- 4.6.3.1 CV2x series, AI vision Autonomous Driving Chip
- 4.6.3.2 CV2x Series, CV22AQ
- 4.6.3.3 CV2x Series, CV22FS and CV2FS
- 4.6.3.4 CV2x Series Cooperation Case
- 4.6.1 Autonomous Driving SoC Product Strategy and Portfolio
5 China Autonomous Driving SoC Vendors and SoC Chip Design
- 5.1 Horizon
- 5.1.1 Autonomous Driving SoC Product Strategy and Portfolio
- 5.1.1.1 Business model: Positioned at Tier2, Four Cooperation Models are Available
- 5.1.1.2 Business model: BPU IP Licensing Model
- 5.1.1.3 Business model: Joint venture with Volkswagen CARIAD
- 5.1.1.4 Customer System: Pursue "More, Fast, Good, Save"
- 5.1.1.5 Journey Series AI Chips: Gaussian Architecture, Bernoulli Architecture, Bayesian Architecture, Nash Architecture, Continuously Evolving
- 5.1.1.6 Journey Series AI chip: through Compiler, the Maximum Computing Performance of FPS can be continuously Improved
- 5.1.1.7 Journey Series AI Chips: Technology Roadmap
- 5.1.1.8 Driving-Parking Integration Solution: multiple Tier1s Realize Mass Production pre-assembly based on Journey Chip
- 5.1.1.9 Autonomous Driving SoC Portfolio (1)
- 5.1.1.10 Autonomous Driving SoC Portfolio (2)
- 5.1.2 Horizon J6 Series
- 5.1.2.1 Core Technology - Intelligent Computing Architecture BPU
- 5.1.2.2 Core Technology - Intelligent Computing Architecture BPU
- 5.1.2.3 Latest Generation of BPU Nash Architecture
- 5.1.2.4 Autonomous Driving SoC Chip - Journey 6 Series
- 5.1.2.5 Autonomous Driving SoC Chip - Journey 6P Analysis
- 5.1.2.6 Autonomous Driving SoC Chip - Journey 6P Analysis
- 5.1.3 Horizon J5
- 5.1.3.1 System Architecture of Horizon J5 (1)
- 5.1.3.2 Bayesian Architecture of Horizon J5 (2)
- 5.1.3.3 System Parameters of Horizon J5 (3)
- 5.1.3.4 Neural Networks model of Horizon J5 (4)
- 5.1.3.5 Horizon J5 Highway NOA (5)
- 5.1.3.6 Horizon J5 Urban NOA, based on Single Chip (6)
- 5.1.3.7 Horizon J5 Functional Safety Certification (7)
- 5.1.4 Horizon J3 Series
- 5.1.4.1 Horizon J3
- 5.1.5 Horizon SuperDrive and Horizon Matrix Series "Turnkey" Solutions
- 5.1.5.1 Full-scenario Intelligent Driving Solution based on Journey 6 series - SuperDrive
- 5.1.5.2 Full-scenario Intelligent Driving Solution based on Journey 6 series - SuperDrive
- 5.1.1 Autonomous Driving SoC Product Strategy and Portfolio
- 5.1.5.3 Full-scenario Intelligent Driving Solution based on Journey 5 series - - Horizon Matrix (R)
- 5.1.5.4 Evolution Route of Horizon Matrix Series
- 5.1.5.5 Product Parameters of Horizon Matrix 5 Series Intelligent Computing Reference Platform
- 5.1.5.6 Horizon Matrix 5 Validation and Adaptation Process
- 5.1.5.7 Horizon Matrix 5 Production Acceleration Package
- 5.1.5.8 Horizon Matrix 5 Collaboration Mode, Hardware IDH Partners
- 5.1.5.9 Journey 3-based Autonomous Driving Solution- Forward-looking ADAS and L2 + Solutions
- 5.1.5.10 Based on Journey 3, Horizon Halo (TM) Automotive Intelligent Interaction Solution
- 5.1.5.11 Based on Journey 2, Horizon Matrix Mono 2.0 Mono Forward Vision Solution
- 5.1.6 Horizon Toolchain and Software Algorithms
- 5.1.6.1 Software and Toolchain: Framework
- 5.1.6.2 Software and Toolchain: Together OS Microkernel Architecture Real-time Automotive Operating System (1)
- 5.1.6.3 Software and Toolchain: Together OS Microkernel Architecture Real-time Automotive Operating System (2)
- 5.1.6.4 Software and Tool Chain: Tiangong Kaiwu AI Chip Tool Chain
- 5.1.6.5 Software and Toolchain: Data Closed Loop Development Platform "AIDI"
- 5.1.6.6 Computing Architecture: Migration from "Intelligent Computing 1.0" to "Intelligent Computing 2.0"
- 5.2 Black Sesame
- 5.2.1 Intelligent Driving SoC Product Strategy and Portfolio
- 5.2.1.1 Financial and Operation (1)
- 5.2.1.2 Financial and Operation (2)
- 5.2.1.3 Core Technology: NeuralIQ ISP "Can See", Deep Neural Networks Processor NPU "Can See"
- 5.2.1.4 Core Technology Features: Intelligent Perception SoC Architecture
- 5.2.1.5 Core Technology Features: Key Technology Layout and Breakthrough
- 5.2.1.6 Huashan Series Chips: Technology Roadmap
- 5.2.1.7 Autonomous Driving SoC Chip Product Portfolio (1)
- 5.2.1.8 Autonomous Driving SoC Chip Product Portfolio (2)
- 5.2.2 C1200 Series (C1236/C1296)
- 5.2.2.1 Smart Car Cross-Domain Computing Chip Wudang Series C1200 Family
- 5.2.2.2 Wudang Series Chip: C1200 Smart Car Cross-Domain Computing Chip
- 5.2.2.3 Wudang series chip: Wudang series C1200 chip Core Parameters
- 5.2.2.4 Wudang Series Chip: Wudang Series C1200 Application Scenario
- 5.2.2.5 C1236: Single Chip Supports NOA Driving-parking Integrated Chip Platform
- 5.2.2.6 C1296: Single Chip Platform that Supports Cross-domain Integration Solutions
- 5.2.2.7 Application Scenario Based on C1296 Single Chip Supporting Cross-Domain Integration
- 5.2.2.8 Autonomous Driving Solution Based on Wudang Series C1200 Family (1)
- 5.2.2.9 Autonomous Driving Solution Based on Wudang Series C1200 Family (2)
- 5.2.3 A1000 Series
- 5.2.3.1 Huashan Series Chip: A1000L/A1000/A1000 Pro Chip Parameters
- 5.2.3.2 Huashan Series Chip: Huashan No. 2 A1000 Pro
- 5.2.3.3 Huashan Series Chip: Huashan No. 2 A1000 System Block Diagram
- 5.2.3.4 Huashan Series Chip: Huashan No. 2 A1000 Key Technical Parameters
- 5.2.3.5 Huashan Series Chip: Huashan No. 2 A1000/A1000L key performance parameters
- 5.2.4 Autonomous Driving Software and Algorithm Products
- 5.2.4.1 "Turnkey" Solution: Drive Sensing Single SOC Chip Advanced Driving-Parking Integrated Solution
- 5.2.4.2 "Turnkey" Solution: End-to-End Full Stack Perception Solution
- 5.2.4.3 FAD Autonomous Driving Computing Platform
- 5.2.4.4 AI Algorithm Power Builder Chain: Development Technology Environment Topology
- 5.2.1 Intelligent Driving SoC Product Strategy and Portfolio
- 5.3 SemiDrive
- 5.3.1 Processor Product Line
- 5.3.2 Processor Product Layout: Future-proof Central Computing Architecture
- 5.3.3 Autonomous Driving SoC Product Portfolio (1)
- 5.3.4 Autonomous Driving SoC Product Portfolio (2)
- 5.3.5 Tier1s that Autonomous Driving/Cross-domain SoC mainly Support and Mass Production Solutions
- 5.3.6 X9CC: Neusoft Reach Central Computing Unit X-Center 2.0
- 5.3.7 V9P
- 5.4 Huawei
- 5.4.1 Autonomous Driving SoC - Ascend Series
- 5.4.2 Autonomous Driving SoC: Ascend 910/310 Main Control Chip
- 5.4.3 Autonomous Driving SoC: Ascend 910/310 Adopts Huawei's Self-developed Da Vinci Architecture
- 5.4.4 Autonomous Driving SoC: Ascend 610 and 910 Architecture
- 5.4.5 Autonomous Driving SoC: Ascend 310 Architecture
- 5.4.6 Autonomous Driving SoC: Ascend Max Core Internal Framework and Algorithm Network
- 5.4.7 Intelligent Driving Computing Platform - MDC Platform
- 5.4.8 Intelligent Driving Computing Platform MDC610
- 5.4.9 Intelligent Driving Computing Platform MDC610 Hardware Specifications
- 5.4.10 Smart Car Solutions Brand -- Qiankun
- 5.5 AXERA
- 5.5.1 Development History
- 5.5.2 Intelligent Driving SoC Product Line and Its Engineering Platform
- 5.5.3 Intelligent Driving Chip and Its Engineering Platform
- 5.5.4 Two Core Technologies- Aixin Tongyuan Hybrid Precision NPU
- 5.5.5 Two Core Technologies - Aixin Zhimou Eye AI-ISP
- 5.5.6 Create Future Automotive SoC Chip Solutions
- 5.6 RHINO
- 5.6.1 Profile and Product Features
- 5.6.2 Intelligent Driving Solutions - Scalable Computing Engine
- 5.7 Visinex Technology
- 5.7.1 Development History
- 5.7.2 Vision Chip - Haishan Series
- 5.7.3 Intelligent Driving Chip-VS919
- 5.7.4 VS919 Intelligent Driving Solution Completed Integration Test
- 5.7.5 Core Technology -Yaoguang ISP
- 5.7.6 Core Technology- Tianquan NPU
- 5.7.7 Core Technology- Xingtu ToolChain
- 5.8 Baidu Kunlunxin
- 5.8.1 Product Positioning: 2nd & 3rd GEN AI Chips can be oriented to Autonomous Driving Systems
- 5.8.2 2nd GEN AI Chip: 7nm process, 256TOPS
- 5.8.3 Adaptation Results of 2nd GEN AI Chip in Unmanned Driving
- 5.8.4 Product Roadmap
- 5.8.5 Application Framework: Baidu Apollo ERINE Large Model "Perception 2.0" Architecture
- 5.8.6 Application Framework: Future Autonomous Driving may be Integrated with "ERNIE Bot"
6 Other Innovative Autonomous Driving SoC Solutions
- 6.1 Application Prospects of Integrated Memory and Computing in Autonomous Driving SoCs
- 6.1.1 Significance of "Memory and Computing Integration" for Autonomous Driving: Autonomous Driving has AI Large Model/High Computing Power, and Low Power Consumption/Low Cost Requirements
- 6.1.2 Significance of "Memory and Computing Integration" for Autonomous Driving: Large Computing Power + Low Power Consumption
- 6.1.3 Significance of "Memory and Computing Integration" for Autonomous Driving: more than 60 TOPS of Physical Computing Power can be Achieved under Natural Air-cooled Power Consumption
- 6.1.4 Conceptual Graph of "Memory and Computing Integration": Breaks Traditional von Neumann Architecture
- 6.1.5 General"Memory and Computing Integration" Solution: Near Memory Computing, In-Memory Processing, In-Memory Computing
- 6.1.6 PIM (In-Memory Processing) Commercialization Example: Samsung Aquabalt-XL HBM2-PIM
- 6.1.7 PIM (In-Memory Processing) Commercialization Example: Samsung Aquabalt-XL HBM2-PIM
- 6.1.8 PIM (In-Memory Processing) Commercialization Example: Intel Neuromimic Computing Chip Loihi
- 6.1.9 PIM (In-Memory Processing) Commercialization Example: AMD MI100 GPU
- 6.1.10 PIM (In-Memory Processing) Commercialization Example: AMD MI300 GPU
- 6.1.11 True Memory Computing: In-Memory Computing (CIM)
- 6.1.12 In-Memory Computing (CIM) Mainly Faces Technical Path Choice of Storage Media
- 6.1.13 "Memory and Computing Integration" Chip Enterprises and Technology Path Selection
- 6.2 HOUMO.AI
- 6.2.1 Development History
- 6.2.2 Core Technology - Memory and Computing Integration
- 6.2.3 Release the first Memory and Computing Integration Autonomous Driving Chip - Hongtu H30
- 6.2.4 Product Roadmap and Mass Production Deployment of "Hongtu" Series
- 6.2.5 Intelligent Driving Hardware Platform based on Hongtu H30 Chip - Liyu
- 6.2.6 Autonomous Driving Domain Controller Specifications
- 6.2.7 Independently Developed Software Power Builder Chain based on Hongtu H30 chip - Houmo Avenue
- 6.2.8 Industry Solutions
- 6.3 Application Prospects of Chiplet in Autonomous Driving SoCs
- 6.3.1 Three Drivers: AI Computing Power's Achilles Heel "Memory Wall" (1)
- 6.3.2 Three Drivers: AI Computing Power's Achilles Heel "Memory Wall" (2)
- 6.3.3 Three Drivers: High-performance Computing Chip Cost and Yield Issues (1)
- 6.3.4 Three Drivers: High-performance Computing Chip Cost and Yield Issues (2)
- 6.3.5 Three Drivers: Flexibility and IP Reuse
- 6.3.6 Two Core Technology Fra
